claimroutineinferred_dep

Descriptor processing fits within child volume

Descriptor handling at each child is absorbed in O(Vj)O(V_j)
shows descriptor cost adds nothing to the recurrence
Claim·§4.2 Transferring a finite circuit to address permutations·inside propPower-width chunk interchange in O(Ve^τ)

Statement (paper)

Even when the payload is one bit, descriptor processing at a child of depth j≤k0=log⁡me0j\le k_0=\log_m e_0 in a power-width call of width e0=mk0e_0=m^{k_0} and root volume V0V_0 takes (log⁡(2V0))O(1)=O(Vj)(\log(2V_0))^{O(1)}=O(V_j) time, where Vj=V0/WjV_j=V_0/W^j is the volume of that child; in particular, it fits within the additional O(V)O(V) term at each node. This is because Vj≥q2e0V_j\ge q^{2e_0} and jlog⁡W≤(log⁡me0)log⁡W=O(e0)=O(log⁡Vj)j\log W\le(\log_m e_0)\log W=O(e_0)=O(\log V_j), so that log⁡V0=log⁡Vj+jlog⁡W=O(log⁡(2Vj))\log V_0=\log V_j+j\log W=O(\log(2V_j)).

In plain English

Even with a one-bit payload, processing the descriptor at a child of depth j≤k0=log⁡me0j\le k_0=\log_m e_0 in a power-width call of width e0=mk0e_0=m^{k_0} and root volume V0V_0 takes (log⁡(2V0))O(1)=O(Vj)(\log(2V_0))^{O(1)}=O(V_j) time, where Vj=V0/WjV_j=V_0/W^j is that child's volume. So it is absorbed by the additional O(V)O(V) term at each node.

Why it's here

This shows the descriptor handling left over from the depth-first schedule adds no new cost to the swap recurrence. The reason is that Vj≥q2e0V_j\ge q^{2e_0} and jlog⁡W=O(e0)=O(log⁡Vj)j\log W=O(e_0)=O(\log V_j), so log⁡V0=log⁡Vj+jlog⁡W=O(log⁡(2Vj))\log V_0=\log V_j+j\log W=O(\log(2V_j)), and a polylogarithm in V0V_0 is therefore bounded by O(Vj)O(V_j).
Classified routine:
A direct bookkeeping calculation inside the proof. It bounds log⁡V0\log V_0 by O(log⁡Vj)O(\log V_j) using Vj≥q2e0V_j\ge q^{2e_0} and jlog⁡W=O(e0)j\log W=O(e_0), so the polylogarithmic descriptor cost is absorbed into the O(V)O(V) per-node term of the depth-first schedule (the previous claim).

Uses

Used by

Nothing in the paper

Sources

PaperOpen
Section
§4.2 Transferring a finite circuit to address permutations
Page
—
Label
—
Line
sections/04-swap.tex:244
Leannot aligned

Phase 2 aligns this node to a Lean declaration.

Friction

  • info
    inferred_dep
    outline: "Descriptor processing absorbed by child volume" rests on claim-prop-power-interchange-5